In terms of power handling a switch field effect transistor (FET) is limited in its high impedance “off”state by the gate bias voltage used to control the device. In the high impedance state, the switch FET is typically connected to an amplifier which is also biased off and has the effect of placing the switch FET in a shunt configuration with the source terminated in a short. As with most switch FETs, the gate terminal is terminated with an RF “open.” Thus, approximately half the RF voltage on the drain appears on the gate and is superposed on the gate bias voltage. The RF voltage swing on the switch FET turns the FET “on” for a portion of the RF cycle thereby reducing power handling if one of the following conditions occurs: (1) the RF voltage swing on the gate exceeds the pinch-off voltage of the device, or ((2) the difference between the instantaneous drain-to-gate voltage exceeds the breakdown voltage of the device.) In mobile phones where battery power supplies are typically around three volts, the first condition often occurs before the second.
Prior solutions for handling switch FETs in the off state involve stacking switch FETs in series. This solution essentially divides the RF voltage across a number of switch FETs, which keeps the gate-to-source and gate-to-drain voltages within the ranges necessary to obtain the“off” condition. A problem with this approach is that a large number of stacked switch FETs in series creates a large circuit size and therefore is costly. It also increases the insertion loss of the switch.